EC310 PCI-Express Bus Controller

See EC314 for 4-Lane PCI Express Endpoint Controller

Features

• Certified PCI Express compliance with PCI-SIG.
• Supports all 3 layers of PCI Express protocol.
• Simple user interface to send and receive requests from the PCI Express Link with address and data bus.
• Automatically generates and decodes all PCI Express packets and header information.
• Handles all PCI Express protocols, ordering rules, flow control, LCRC, error checking, replay, scrambling and lane training.
• Includes all PCI Express configuration and power management registers.
• High performance design deliver close to 100% of the theoretical bandwidth in real applications.
• Multiple posted requests and pending request queues.
• Single lane and optional 4 lane supports up to 10Gbps.
• Optional AHB user interface and DMA transfer.
• Synthesizable RTL code for ASIC and FPGA implementations.
• Standard PIPE interface supports for on-chip and off-chip PHY.
• Silicon proven design interoperable across multiple platforms.
• PCI Express development kit available, including development board, demonstration software and device driver.

Diagram